Simon Butler

Simon Butler is a graduate of the University of Manchester (UMIST) and has 18 years of engineering experience with IC's. His design/EDA background includes DSP/FFT processor core development, 64bit MIPS processor development, x86 methododology consultant, physical floorplanning EDA tools, mixed signal/analog layout EDA tools. He was a senior design engineer at Fujitsu Ltd, consulting services engineer at High Level Design Systems (acquired by Cadence), CAD manager at Sandcraft, consulting architect at Cadence Design Systems, a founder at Sabio Labs (acquired by Magma), founded IC Methods LLC in 2000 and co-founded MethodICs LLC in 2006

Fergus Slorach

Fergus Slorach has over 20 years experience in Digital IC design and Electronic Design Automation. He started out designing digital ICs for high energy physics experiments and telecoms applications, but gradually made the switch to design and support of the software tools used by IC designers. He then spent several years at Cadence Design Systems in Europe and the USA, providing on-site support to industry-leading companies on a variety of projects, including DRAM and microprocessor development. In 1996, Fergus joined Transmeta, then a small startup company, where he was largely responsible for creating the EDA environment used in the design of a revolutionary microprocessor. Fergus co-founded MethodICs LLC in 2006.

Roni Simonian

Roni Simonian earned an undergraduate degree in Physics and Applied Math from Moscow Institute of Physics and Technology and a master's degree in Computer Science from SUNY Stony Brook. Prior to working in EDA Roni did research in computational molecular physics and worked in computer graphics at a various start-ups. Her experience in EDA includes 8 years development of two fast spice simulators: Nanosim (Synopsys) and AFS (Berkeley Design Automation). Her current interests include data-management, parallel computing and system-level programming.

Tara Clark

Tara Clark became interested in EDA in 1986 while she was an undergraduate at the University of California, Berkeley. After graduating from U.C. Berkeley, she continued on to the University of Colorado, Boulder to pursue graduate research in simulation. From 1991 through 2000, she worked for both EDA vendors and chip design companies extending, enhancing and automating their design flow methodologies. Tara's experience includes a wide variety of software development projects with Cadence's Spectrum Services Group; mixed-signal design flow development and support for Cirrus Logic and Microtune; EDA platform development for Hewlett-Packard; and front-to-back EDA tool design and support for Sandcraft. She also spent five years with Micromuse reconnecting with her software roots writing real-time Java applications for network management. Her most recent experience has been as the Director of Core Technologies for Tuscany Design Automation.

Marco Rubinstein

Marco has been involved in the EDA industry for over 15 years, working as an Applications Engineering Manager for Synopsys in Europe before moving to Silicon Valley where he was one of the founders of Meropa (later Get2Chip). Marco spent several years in Engineering management positions at Cadence after their acquisition of Get2Chip and is now based in Europe. Marco has a Masters in Engineering from KTH and an MBA from Warwick University, UK.